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Job Title

Senior ASIC Design Verification Engineer

The median salary range for Senior ASIC Design Verification Engineer disclosed in public job postings is $165k - $245k as of Sep 2026, based on 49 job postings from 8 companies.

Salary Range

Low

$165,000

20%

Mid

$205,000

20%

High

$245,000

Small Sample Size

17 Data Points

Data Points

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SpaceX

11 Job Posts

$165k - $260k

$165,000 - $260,000

OmniML

3 Job Posts

$205k - $245k

$205,000 - $245,000

NVIDIA

3 Job Posts

$205k - $245k

$205,000 - $245,000

Excelero Storage

3 Job Posts

$205k - $245k

$205,000 - $245,000

Google

8 Job Posts

$163k - $237k

$163,000 - $236,500

Niku

6 Job Posts

$127k - $226k

$127,100 - $226,000

Amazon

3 Job Posts

$159k - $215k

$159,200 - $215,300

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