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Family & Level

Job Title

Senior ASIC Design for Test Engineer

The median salary range for Senior ASIC Design for Test Engineer disclosed in public job postings is $167k - $254k as of Jul 2026, based on 5 job postings from 2 companies.

Salary Range

Low

$166,500

21%

Mid

$210,000

21%

High

$253,500

Insufficient Sample Size

3 Data Points

Data Points

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SpaceX

3 Job Posts

$170k - $270k

$170,000 - $270,000

Sr. ASIC DFT Engineer (Silicon)

Sunnyvale

5+ Years Experience

$175k - $280k

$175,000 - $280,000

Sr. ASIC DFT Engineer (Silicon)

Irvine

5+ Years Experience

$165k - $260k

$165,000 - $260,000

Sr. ASIC DFT Engineer (Silicon)

Austin

5+ Years Experience

N/A

N/A

Google

2 Job Posts

$163k - $237k

$163,000 - $237,000

Senior ASIC DFT Engineer, Silicon

United States

8+ Years Experience

$163k - $237k

$163,000 - $237,000

Senior ASIC DFT Engineer, Silicon

Mountain View

8+ Years Experience

$163k - $237k

$163,000 - $237,000

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