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Job Title

System on Chip Design Verification Engineer

The median salary range for System on Chip Design Verification Engineer disclosed in public job postings is $114k - $187k as of Sep 2026, based on 37 job postings from 4 companies.

Salary Range

Low

$114,045

24%

Mid

$150,323

24%

High

$186,600

Small Sample Size

8 Data Points

Data Points

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Apple

5 Job Posts

$127k - $221k

$126,800 - $220,900

Barefoot Networks

13 Job Posts

$114k - $187k

$114,045 - $186,600

Nervana

12 Job Posts

$106k - $173k

$105,650 - $172,860

Google

1 Job Post

N/A

N/A

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