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System on Chip Logic Design Engineer
The median salary range for System on Chip Logic Design Engineer disclosed in public job postings is $132k - $216k as of Jul 2026, based on 8 job postings from 2 companies.
Salary Range
Low
$132,175
24%
Mid
$174,220
24%
High
$216,265
Small Sample Size
8 Data Points
Data Points
Sort By
SoC Logic Design Engineer
Santa Clara
·6+ Years Experience
Active
$142k - $269k
$141,910 - $269,100
SoC Logic Design Engineer
Santa Clara
·4+ Years Experience
Active
$122k - $232k
$122,440 - $232,190
SoC Logic Design Engineer
Hillsboro
·4+ Years Experience
Active
$142k - $200k
$141,910 - $200,340
SOC Logic Design Engineer
Remote
·1+ Years Experience
Active
$91k - $173k
$91,150 - $172,860
SoC Logic Design Engineer
Santa Clara
·6+ Years Experience
Active
$142k - $269k
$141,910 - $269,100
SoC Logic Design Engineer
Santa Clara
·4+ Years Experience
Active
$122k - $232k
$122,440 - $232,190
SoC Logic Design Engineer
Hillsboro
·4+ Years Experience
Active
$142k - $200k
$141,910 - $200,340
SOC Logic Design Engineer
Remote
·1+ Years Experience
Active