CPU Design Engineer Salary | $259k

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Job Title

CPU Design Engineer

Salary Range

$258,750

Insufficient Sample Size

5 Data Points

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NVIDIA

1 Job Post

$259k

$258,750

CPU Design Methodology Engineer

Hillsboro

·

5+ Years Experience

·

Last Posted: Aug 2024

Inactive

$259k

$258,750

Excelero Storage

1 Job Post

$259k

$258,750

CPU Design Methodology Engineer

Hillsboro

·

5+ Years Experience

·

Last Posted: Aug 2024

Inactive

$259k

$258,750

Apple

36 Job Posts

$130k - $242k

$130,000 - $242,000

CPU Silicon Timing Correlation Engineer

Santa Clara

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Design Timing Engineer

United States

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Physical Design Engineer

Cupertino

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Physical Design Engineer

United States

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Verification Methodology and Tool Engineer

Cupertino

·

10+ Years Experience

·

Last Posted: Sep 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Physical Design Methodology and Optimization Engineer

Cupertino

·

Last Posted: Apr 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Verification Methodology and Tool Engineer

Santa Clara

·

10+ Years Experience

·

Last Posted: Sep 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Physical Design Methodology and Optimization Engineer

Santa Clara

·

Last Posted: Apr 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Physical Design Engineer

Santa Clara

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Verification Methodology and Tool Engineer

United States

·

10+ Years Experience

·

Last Posted: Sep 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Physical Design Methodology and Optimization Engineer

United States

·

Last Posted: Apr 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Silicon Timing Correlation Engineer

Cupertino

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Silicon Timing Correlation Engineer

United States

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Design Timing Engineer

Cupertino

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Design Timing Engineer

Santa Clara

·

Last Posted: Oct 2024

Inactive

$161k - $278k

$161,000 - $278,000

CPU Physical Design and Integration Engineer

Santa Clara

·

Last Posted: Aug 2024

Inactive

$139k - $257k

$138,900 - $256,500

CPU Physical Design and Integration Engineer

Cupertino

·

Last Posted: Aug 2024

Inactive

$139k - $257k

$138,900 - $256,500

CPU Physical Design and Integration Engineer

United States

·

Last Posted: Aug 2024

Inactive

$139k - $257k

$138,900 - $256,500

CPU Gate Level Synthesis/Verification Engineer

Santa Clara

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Design Timing Engineer

Cupertino

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Physical Design Methodology and Optimization Engineer

Cupertino

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Design Timing Engineer

Santa Clara

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Design Timing Engineer

United States

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Physical Design Engineer

Cupertino

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Physical Design Engineer

Santa Clara

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Physical Design Engineer

United States

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Gate Level Synthesis/Verification Engineer

Cupertino

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Gate Level Synthesis/Verification Engineer

United States

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Verification Methodology and Tool Engineer

Cupertino

·

3+ Years Experience

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Verification Methodology and Tool Engineer

Santa Clara

·

3+ Years Experience

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Verification Methodology and Tool Engineer

United States

·

3+ Years Experience

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Physical Design Methodology and Optimization Engineer

Santa Clara

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Physical Design Methodology and Optimization Engineer

United States

·

Last Posted: Apr 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Silicon Timing Correlation Engineer

Santa Clara

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Silicon Timing Correlation Engineer

United States

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

CPU Silicon Timing Correlation Engineer

Cupertino

·

Last Posted: Oct 2024

Inactive

$130k - $242k

$130,000 - $242,000

1 - 3 of 5

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