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Family & Level

Job Title

System on Chip Design Verification Engineer

The median salary range for System on Chip Design Verification Engineer disclosed in public job postings is $122k - $200k as of Aug 2026, based on 30 job postings from 4 companies.

Salary Range

Low

$122,440

24%

Mid

$161,390

24%

High

$200,340

Small Sample Size

8 Data Points

Data Points

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